Cavium Thunder x Based Server Board
Design, testing and productization of a dual CPU based backplane server board based on CN88XX processor.
Results / Outcomes
- Successfully designed the Cavium Thunder X based server reference platform in a single spin.
- Detailed EVT of the product including interface validation of 40G QSFP and 10G SFP+, PCIe3.0 and XAUI interfaces.
- Successfully completed all the certifications of the board.
- Successfully implemented all manufacturing testing including chassis test of the server board.
System Design and Implementation Details
- DDR4 RDIMM, 1x QSFP+(40G), 2x SFP+(10G), 1x USB 3.0, 1 x USB1.1,
- 1x 10/100/1000 LAN, 1x DB9, 1x VGA,
- 1x X8 PCIe connector on board,
- 1x X24 connector with X8 electrical connection.
- 2X 0.5mm pitch 50 pin backplane connector
- Productization of dual chipset server board with a board management controller with ARM 64 powered CPU and 288-pin RDIMM connector
- Power design involving high current rated programmable buck regulators which source current up to 128A
Hardware Design (Schematics)
- Complex power section design in adhering to PCIe electro-mechanical spec.
- Part selection to minimal foot print as possible to accumulate all interfaces in required PCB dimensions.
- Active heat sink and TIM material selection.
PCB Design (Layout)
- Half height/Half length PCIe card (167x 65mm), 12 layer 1.6mm thick PCB.
- Routing complexity involving differential pair and group length matching and intra spacing for the PCIe 2.1 Interfaces between Octeon/Nitrox/ Intel chipsets placed on a single side of PCB
- Very high current sourcing power plane cutting for various voltages on board.
- Highly challenge to achieve all the above specifications in required form-factor.
Fab and Assembly House co-ordination
- DFM and DFA reviews
- Low cost CBOM’s with low cost alternates identified for high cost parts, lifetime check for critical components in design including NAND and NOR flashes
- Manufacturing support with alternates identified for components going to EOL/obsolesce
Board bring-up and Testing
- Initial bring-up of the board followed by detailed Electrical interface validation(EVT) including interface validation of XAUI, PCIe interfaces
- ispPAC(voltage/reset sequencer) programming for power/reset sequencing
Firmware Application Development
- Development of bootloaders for Octeon chipset including memory configuration of NOR flash and NAND flash, boot configuration strapping, PCIe configuration, etc
- Development of manufacturing test scripts for board testing.
- Development of PCIe/XAUI drivers for chipsets
Mechanical and 3-D Design
- Prepared the 3-D model of the board.
- Worked with 3rd party mechanical team for developing heat sink and I/O bezel
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